Vision chips, or smart visual sensors, are those sensors that have integrated image acquisition and parallel processing, often at the pixel level, using dedicated analogue and digital circuits. This text presents a systematic approach to the design and analysis of vision chips using analogue VLSL. It presents algorithmic level implementation issues, from both the VLSI and computer vision points of view. VLSI technologies and general analogue VLSI design methodologies are reviewed, in the context of suitability for vision chips. Chip-level architectural issues are discussed, including tessellation structures, pixel-processor interaction, and data read-out. Analyses of building-blocks necessary in vision chips are presented, including photodetectors, photocircuits, and spatial and temporal processing circuits. Other important design issues, such as testing, digital noise, and mismatch are covered, and the text reviews some of the past and existing implementations of smart vision sensors. It contains condensed information on more than fifty vision chips, designed by research laboratories all over the world.
Novel and interesting features of each vision chip have been highlighted through diagrams and descriptions.